Wafer-Scale Integration for Semi-Flexible Neural Implant Miniaturization

A RAM-based Neural Network Architecture for Wafer Scale Integration

While the use of WSI technology to increase the integration density of RAM devices may not be cost effective (cf. Anamartic’s failed WSI RAMs [23]), low defect tolerance overheads, high testability, and low power consumption make memories ideal building blocks for WSI processor architectures. Indeed, this is reflected in the number of memory-based WSI devices manufactured to date [15,19,22,23,24].

Wafer Scale Integration of Parallel Processors

Three Dimensional Integration and On-wafer Packaging for Heterogeneous Wafer-scale Circuit Architectures

Advanced Network Centric Warfare (NCW) systems are critical to the successful implementation of the Army’s Future Force. These systems require a new generation of circuits with deployable, agile, versatile, lethal, survivable and sustainable capabilities. Both manned and unmanned vehicles are required to established dominance in the battlefield via use of multi-band, agile, multifunctional mobi...

Miniaturization of Flexible Screwing Cell

The research in mini, micro and desktop factories originates from the early 90’s and has continued since then by developing the technological basis and different technological building bricks and applications in the field of highprecision manufacturing and assembly of future miniaturised and micro products. This has paved the way for mini, micro and desktop factories which are seen as one poten...

Approximation Algorithms for the Wafer to Wafer Integration Problem

Motivated by the yield optimization problem in semiconductor manufacturing, we model the wafer to wafer integration problem as a special multi-dimensional assignment problem (called WWI-m), and study it from an approximation point of view. We give approximation algorithms achieving an approximation factor of 3 2 and 4 3 for WWI-3, and we show that extensions of these algorithms to the case of a...